An example of this type of semiconductor integrated circuit is shown in FIG. 11. In FIG. 11, a reference power voltage 2 obtained from an external power source 1 is supplied to a constant voltage generation device 3. The constant voltage generation device 3 generates a fixed constant voltage 4, based on the reference power voltage 2, and supplies it as a power voltage to first and second function blocks 6A and 6B. The first and second function blocks 6A and 6B convert any input signals 5A and 5B based on corresponding specific functions, to generated output signals 7A and 7B having specific functions. When the first and second function blocks 6A and 6B are in a standby state, the operation of the corresponding first and second function blocks 6A and 6B is halted and the current supplied from the output constant voltage 4 is reduced by suppressing the signals 5A and 5B by function stop signals 8A and 8B.
With a conventional semiconductor integrated circuit, the constant voltage 4 is necessary for enabling response at the highest operating speed for all operating states for converting any input signals 5A and 5B to specific functions.
However, when the constant voltage 4 is supplied at the highest operating speed in all of the operating states of the first and second function blocks 6A and 6B, even if it is necessary for one function block 5A to operate at the highest speed, it could happen that such an operating speed is not required for the other function block 5B. As a case in which the difference between the highest operating speed and the lowest operating speed in operation is extremely large, it is possible to consider that a data access circuit and a frequency converter are used in common within the semiconductor integrated circuit.
If prior-art techniques are used, a high power voltage corresponding to the highest response speed will be necessary for one function block 6A in such a case, and it is not possible to control the power consumption.
With prior-art techniques, although it is possible to reduce the operating current on standby, a large amount of operating current is consumed during operation when the semiconductor integrated circuit contains at least two circuits having different operating speed respectively and there is an extremely large difference between the highest operating speed and the lowest operating speed while in the operating state, because the power voltage while in the operating state is supplied as a voltage level at a signal response that is enabled by the highest operating speed of the function blocks. It is therefore difficult to guarantee the circuit response speed at both the highest operating speed and the lowest operating speed necessary for the function blocks, while simultaneously implementing a reduction in power current.
The MOS transistors that configure the plurality of function blocks often have different threshold voltages, due to unevenness in the semiconductor wafer surface during the manufacturing process. This raises a technical problem in that the frequency response speeds will be different for each function block, even if the same power voltage is supplied to all of the function blocks operating at the same speed.
An objective of the present invention is to provide a semiconductor integrated circuit and electronic equipment using the same which solve the previously described technical problems and make it possible to reduce the operating current flowing during operation and thus reduce the power consumption, even if there are at least two circuits, which have different operating speed respectively, coexisting within the semiconductor integrated circuit, and the difference between the highest operating speed and the lowest operating speed is extremely large.
Another objective of the present invention is to provide a semiconductor integrated circuit and electronic equipment using the same which make it possible to reduce variations in the frequency response speeds of a plurality of function blocks, even when the manufacturing process has created differences in the threshold voltages of MOS transistors configuring those function blocks and the same power voltage is supplied to the function blocks operating at the same operating speed.